1. Field of the Invention
The present invention relates to a non-reducible dielectric ceramic composition, and more particularly to a non-reducible dielectric ceramic composition which has a high dielectric constant when sintered at a low temperature and satisfies X5R characteristics (xe2x88x9255 to 85xc2x0 C., xcex94C=xc2x115%), a multilayer ceramic chip capacitor using the composition and a method for preparing the multilayer ceramic chip capacitor.
2. Description of the Related Art
Multilayer ceramic chip capacitors are widely used as electronic parts featuring a small size, high capacitance and high reliability, with a number of such capacitors being employed in one electronic device. In the recent drive toward small-size, high-performance devices, there is an increasing requirement to develop multilayer ceramic chip capacitors of smaller size, higher capacitance, lower cost, and higher reliability. The multilayer ceramic chip capacitors are generally manufactured by alternately stacking dielectric layers and internal electrode layers, followed by sintering.
Palladium or palladium alloys have generally been used as the conductor of an internal electrode. Recently, use of relatively inexpensive base metals such as nickel or nickel alloys as the conductor of an internal electrode has increased. In the event that base metals are used as the conductor of an internal electrode, the internal electrodes may be oxidized upon being sintered in air. Therefore, co-sintering of dielectric layers and internal electrode layers must be effected in a reducing atmosphere. However, sintering in a reducing atmosphere causes the dielectric layers to be reduced, resulting in a lower resistivity. Non-reducible dielectric ceramic materials were thus proposed.
However, multilayer dielectric ceramic chip capacitors using non-reducible dielectric ceramic materials have a remarkably deteriorated insulation resistance (IR) when an electric field is applied. That is, they have problems including a short lifetime of IR and low reliability. When the dielectric materials are subject to a direct current electric field, there arises another problem that their dielectric constant (xcex5r) is reduced with time. If thinner dielectric ceramic layers are used in order to provide chip capacitors of a smaller size and greater capacitance, application of direct current voltage across the capacitors causes the dielectric ceramic layers to receive a stronger electric field, resulting in a greater change of dielectric constant xcex5r with time (that is, a greater change of capacitance with time). Capacitors are also required to have an excellent temperature characteristic of capacitance (TCC). Capacitors used for particular purposes are required to have a stable temperature characteristic of capacitance under severe conditions. Exemplary temperature-compensating dielectric ceramic materials which are excellent in a temperature characteristic of capacitance are compositions of (Sr, Ca) (Ti, Zr)O3, Ca(Ti, Zr)O3, Nd2O3-2TiO2, and La2O3-2TiO2. However, these materials have a very low dielectric constant (generally, 100 or less) and thus cannot be used in preparing capacitors with a high capacitance.
A composition having BaTiO3 as a major component with Nb2O5xe2x80x94Co3O4, MgOxe2x80x94Y, a rare earth element (Dy, Ho, etc.), BaTiO3xe2x80x94TiO2, etc. added is disclosed, which has a high dielectric constant and a fixed temperature characteristic of capacitance. However, the dielectric ceramic composition including BaTiO3 as a major component fails to satisfy XR characteristics (xcex94C=xc2x115%) at a high temperature, because a Curie temperature of BaTiO3 is about 130xc2x0 C.
Exemplary dielectric ceramic compositions with BaTiO3 as a major component are disclosed in U.S. Pat. No. 5,668,694; U.S. Pat. No. 5,862,034; Japanese Patent Application Laid-Open Publication No. 6-215979; Japanese Patent Application Laid-Open Publication No. 2000-311828 and Korean Patent Application Laid-Open Publication No. 2000-0012080.
U.S. Pat. Nos. 5,668,694 and 5,862,034 disclose a multilayer ceramic chip capacitor that contains BaTiO3 as a major component and MgO, Y2O3, BaO, CaO, SiO2, MnO, V2O5, and MoO3 as minor components in such a proportion that there are present MgO: 0.1 to 3 mol, Y2O3: 0 to 5 mol, BaO+CaO: 2 to 12 mol, SiO2: 2 to 12 mol, MnO: 0 to 0.5 mol, V2O5: 0 to 0.3 mol, MoO3: 0 to 0.3 mol, and V2O5+MoO3: more than 0 mol, per 100 mol of BaTiO3. This capacitor satisfies X7R characteristics but has disadvantages in that its dielectric constant is as low as 2,600 and it must be sintered at a high temperature of 1,300xc2x0 C.
Japanese Patent Application Laid-Open Publication No. 6-215979 discloses a dielectric ceramic composition which comprises, BaTiO3: 86.32 to 97.64 mol, Y2O3: 0.01 to 10.00 mol, MgO: 0.01 to 10.0 mol, V2O5: 0.001 to 0.200 mol, at least one selected from MnO, Cr2O3 and Co2O3: 0.01 to 1.0 mol, and BaxCa(1xe2x88x92x)SiO3 (provided that 0xe2x89xa6xxe2x89xa61): 0.5 to 10 mol. This dielectric composition has a dielectric constant of 2,560 to 3,850 and satisfies X7R characteristics, but has a sintering temperature of as high as 1,300 to 1,380xc2x0 C.
Japanese Patent Application Laid-Open Publication No. 2000-311828 discloses a dielectric ceramic composition which comprises, BaTiO3: 100 mol, at least one selected from MgO and CaO: 0.1 to 3 mol, MnO: 0.05 to 1.0 mol, Y2O3: 0.1 to 5 mol, V2O5: 0.1 to 3 mol and BaxCa(1xe2x88x92x)SiO3 (provided that 0xe2x89xa6xxe2x89xa61): 2 to 12 mol. This dielectric composition satisfies X7R characteristics, but has a dielectric constant of less than 3,000 and a sintering temperature of as high as 1,270xc2x0 C.
Korean Patent Application Laid-Open Publication No. 2000-0012080 discloses a dielectric ceramic composition which comprises, per 100 mol of BaTiO3 as a major component, Cr2O3: 0.1 to 3 mol, V2O5: 0.01 to 0.5 mol, an oxide of R1 (R1: Y, Ho or Dy): 0.7 to 7 mol and MnO: 0.5 or less. This dielectric composition has a dielectric constant of 1,473 to 3,086 and satisfies X8R characteristics (xe2x88x9255 to 150xc2x0 C., xcex94C=xc2x115%) but is required to have a sintering temperature of as high as 1,280 to 1,300xc2x0 C.
These BaTiO3-based dielectric ceramic compositions satisfy X7R characteristics (xe2x80x9455 to 125xc2x0 C., xcex94C=xc2x115%) stipulated under the EIA standard but have a low dielectric constant. Especially, in the case that a dielectric constant is 3,000, a sintering temperature is too high, for example, 1,300xc2x0 C. or more. If the sintering temperature is as high as 1,300xc2x0 C., an internal electrode layer shrinks at a lower temperature than a dielectric ceramic layer, thereby interfacial delamination of the two layers occurring. Furthermore, at higher sintering temperatures, lumping or break between internal electrode layers frequently occurs, thereby the reduction of capacitance and the short circuit between internal electrodes being liable to occur.
Therefore, the present invention has been made in view of the above problems, and it is an object of the present invention to provide a dielectric ceramic composition which has a high dielectric constant even at a low sintering temperature, satisfies X5R characteristics (xe2x88x9255 to 85xc2x0 C., xcex94C=xc2x115%), can be sintered under a reducing atmosphere and shows a long lifetime of IR. Another object of the invention is to provide a multilayer ceramic chip capacitor using the composition and a method for preparing the multilayer ceramic chip capacitor.
In accordance with one aspect of the present invention, the above and other objects can be accomplished by providing a dielectric ceramic composition which comprises, BaTiO3; MgCO3: 0.2 to 3.0 mol; at least one selected from Y2O3, Ho2O3, Dy2O3 and Yb2O3: 0.05 to 1.5 mol; Cr2O3: 0.1 to 1.5 mol; BaxCa(1xe2x88x92x)SiO3 (provided that 0xe2x89xa6xxe2x89xa61): 0.2 to 3.0 mol; and Mn2V2O7: 0.01 to 1.5 mol, per 100 mol of BaTiO3.
In accordance with another aspect of the present invention, there is provided a multilayer ceramic chip capacitor comprising alternately staked, dielectric ceramic layers with the above dielectric ceramic composition and internal electrode layers.
In accordance with yet another aspect of the present invention, there is provided a method for preparing the multilayer ceramic chip capacitor, comprising the steps of calcining MnO and V2O5 at a temperature of 650 to 800xc2x0 C. to obtain Mn2V2O7 in the form of powder; mixing BaTiO3, MgCO3: 0.2 to 3.0 mol, at least one selected from Y2O3, Ho2O3, Dy2O3 and Yb2O3: 0.05 to 1.5 mol, Cr2O3: 0.1 to 1.5 mol, BaxCa(1xe2x88x92x)SiO3 (provided that 0xe2x89xa6xxe2x89xa61): 0.2 to 3.0 mol, and Mn2V2O7: 0.01 to 1.5 mol, per 100 mol of BaTiO3, to obtain dielectric material; alternately stacking the dielectric material and internal electrode to obtain laminated body; and sintering laminated body.